CA3310 Datasheet | Intersil

features a built-in track and hold. The track and hold will follow high bandwidth input signals, as it has only a 100ns (typical) input time constant. The ten data outputs feature full high-speed CMOS threestate bus driver capability, and are latched and held through a full conversion cycle. Separate 8 MSB and 2 LSB enables, a data ready flag, and conversion start and ready reset inputs plete the microprocessor interface. An internal, adjustable clock is provided and is available as an output. The clock may also be driven from an external source. Features - CMOS Low Power (Typ) - - - - . 15m W - Single Supply Voltage - - - - . 3V to 6V - Conversion Time - - - - - . . . 13µs - Built-In Track and Hold - Rail-to-Rail Input Range - Latched Three-state Output Drivers - Microprocessor-patible Control Lines - Internal or External Clock Applications - Fast, No-Droop, Sample and Hold - Voice Grade Digital Audio - DSP Modems - Remote Low Power Data Acquisition Systems - µP Controlled Systems Part Number Information PART NUMBER CA3310E CA3310M CA3310AM LINEARITY (INL, DNL) ±0.75 LSB ±0.75 LSB ±0.5 LSB TEMP. RANGE (o C) -40 to 85 -40 to 85 -40 to 85 PKG. NO. E24.6 M24.3 M24.3 Related Literature - Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” PACKAGE 24 Ld PDIP 24 Ld SOIC 24 Ld SOIC Pinout CA3310, CA3310A (PDIP, SOIC) TOP VIEW D0 (LSB) D1 D2 D3 D4 D5 D6 D7 D8 D9 (MSB) DRDY VSS (GND) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VDD VIN VREF + REXT CLK STRT VREF VAA+ VAAOEL OEM DRST CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved CA3310, CA3310A Functional Block...